1. Field of the Invention
The present invention relates to an apparatus, a memory device and a method of improving redundancy.
2. Description of Related Art
With miniaturization of a semiconductor fabricating process, the number of defects of a memory device which are caused during the fabrication (e.g., dust particles) is increasing. The defects gradually deteriorate use of the device, until the memory device finally becomes inoperative.
Recently, the period when the defects occur, i.e., an initial failure period of a “bathtub curve”, is increasing. Therefore, an accelerated test and the like for screening the initial failures are performed.
However, it is difficult to estimate a duration of performing the accelerated test, and thus it is difficult to completely remove all of the initial failures of the memory device.
Patent Document 1 discloses that a one-bit error of the RAM is recovered by using an ECC (Error Checking and Correcting) code.
In Patent Document 1, a redundant bit for collecting the one-bit error is added to the RAM, and a circuit for the ECC is added to a system to which the RAM is installed.
[Patent Document 1] Japanese Patent Laid-Open No. 11-25690